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| SG6846G -- Highly Integrated Green-Mode PWM Controller October 2008 SG6846G Highly Integrated Green-Mode PWM Controller Features Low Startup Current: 8A Low Operating Current: 3.7mA Peak-Current-Mode Operation with Cycle-by-Cycle Current Limiting PWM Frequency Continuously Decreasing with Burst Mode at Light Loads VDD Over-Voltage Protection (OVP) AC Input Brownout Protection with Hysteresis Constant Output Power Limit (Full AC Input Range) Internal Latch Circuit for OVP, OTP, and OCP Two-Level OCP Delay: 110ms Programmable PWM Frequency with Frequency Hopping OCP Threshold is Half Peak Current Limit Feedback Open-Loop Protection with 110ms Delay Soft Startup Time: 5ms Description A highly integrated PWM controller, SG6846G provides several features to enhance the performance of flyback converters. To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to continuously decrease the switching frequency under light-load conditions. Under zero-load conditions, the power supply enters burst-mode, which completely shuts off PWM output. Output restarts just before the supply voltage drops below the UVLO lower limit. This green-mode function enables power supplies to meet international power conservation requirements. The SG6846G is designed for SMPS with surge-current output, incorporated with a two-level OCP function. Besides the cycle-by-cycle current limiting; if the switching current is higher than OCP threshold and lasts for 110ms, SG6846G shuts down immediately. SG6846G also integrates a frequency-hopping function internally, which helps reduce EMI emission of a power supply with minimum line filters. The built-in synchronized slope compensation provides proprietary internal compensation for constant output power limit over a universal AC input range. The gate output is clamped at 18V to protect the external MOSFET from over-voltage damage. Other protection functions include AC input brownout protection with hysteresis and VDD over-voltage protection. For over-temperature protection, an external NTC thermistor can be applied to sense the ambient temperature. When OCP, VDD OVP, or OTP are activated, an internal latch circuit latches off the controller. The latch resets when VDD supply is removed. SG6846G is available in an 8-pin SOP package. Applications General-purpose, switch-mode power supplies and flyback power converters, including: Power Adapters Open-Frame SMPS SMPS with Surge-Current Output, such as for Printers, Scanners, Motor Drivers Ordering Information Part Number SG6846GLSY Operating Temperature Range -40 to +105C OCP Latch Yes Eco Status Green Package 8-Pin Small Outline Package (SOP) Packing Method Tape & Reel For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com SG6846G -- Highly Integrated Green-Mode PWM Controller Typical Application L AC input EMI Filter + + VO+ N VO+ 7 3 VIN RI FB VDD GATE 8 SENSE 6 4 2 GND 1 RT 5 SG6846G Figure 1. Typical Application Block Diagram Ri 4 0.9V/0.7V VDD VIN 3 Over Power Compensation 1.18-0.08 XVIN Soft Driver 8 GATE VDD -TH-G VDD 7 UVLO Internal BIAS Q S R OSC Green Mode 6V 3R 16.5V/10.5V + 1R R 2 FB Latch Slope Compensation Blanking Circuit 6 SENSE 23.6V 1R Debounce OCP Delay 1R IRT RT 5 1.05V 1.15V 1 GND Figure 2. Block Diagram (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 2 SG6846G -- Highly Integrated Green-Mode PWM Controller Marking Information : Fairchild Logo Z: Plant Code X: Year Code Y: Week Code TT: Die Run Code F: L = OCP Latch T: Package Type, S = SOP P: Y = Green Compound M: Manufacturing Flow Code Figure 3. Top Mark Pin Configuration Figure 4. Pin Configuration Pin Definitions Pin # 1 2 Name GND FB Function Ground Feedback Line-voltage Detection Reference Setting Description Ground. The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is determined in response to the signal from this pin and the current-sense signal from pin 6. Line-voltage detection is used for brownout protection with hysteresis. Constant output power limit over universal AC input range is also achieved using this pin. Add a low-pass filter to filter out line ripple on the bulk capacitor. A resistor from the RI pin to ground generates a reference current source that determines the switching frequency. Increasing the resistance reduces the switching frequency. Using a 26k resistor results in a 65kHz switching frequency. For over-temperature protection, an external NTC thermistor is connected from this pin to the GND pin. The impedance of the NTC decreases at high temperatures. Once the voltage of the RT pin drops below a threshold, PWM output is disabled. Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle current limiting. If the switching current is higher than OCP threshold and lasts for 110ms, SG6846G turns off immediately. This two-level OCP feature is especially suitable for SMPS with surge current output. Power supply. If an open-circuit failure occurs in the feedback loop, the internal protection circuit disables PWM output as long as VDD exceeds a threshold. The totem-pole output driver for the power MOSFET. It is internally clamped below 18V. www.fairchildsemi.com 3 3 VIN 4 RI 5 RT Temperature Detection 6 SENSE Current Sense 7 8 VDD GATE Power Supply Driver Output (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 SG6846G -- Highly Integrated Green-Mode PWM Controller Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are given with respect to GND pin. Symbol VDD VL PD JC TJ TSTG TL ESD Supply Voltage Parameter Input Voltage to FB, SENSE, VIN, RT,RI Pin Power Dissipation at TA<50C Thermal Resistance (Junction-to-Case) Operating Junction Temperature Storage Temperature Range Lead Temperature, Wave Soldering, 10 Seconds Human Body Model, JESD22-A114 Charge Device Model, JESD22-C101 Min. -0.3 Max. 25 7.0 400 54.4 Unit V V mW C/W C C C kV -40 -65 +150 +150 +260 5.0 1.5 Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Operating Ambient Temperature Min. -40 Max. +105 Unit C (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 4 SG6846G -- Highly Integrated Green-Mode PWM Controller Electrical Characteristics VDD = 15V and TA = 25C unless otherwise noted. Symbol VDD Section VDD-OP VDD-ON VDD-OFF VDD-LH IDD-ST IDD-OP VDD-OVP tD-VDDOVP IDD-OVP Parameter Continuously Operating Voltage Turn-on Threshold Voltage Turn-off Voltage Threshold Voltage for Latch-off Release Startup Current Operating Supply Current VDD Over-Voltage Protection (Latch off) VDD OVP Debounce Time VDD OVP Latch-up Holding Current Test Condition Min. Typ. Max. 20 Unit V V V V A mA V s A 15.5 9.5 3 VDD-ON - 0.16V GATE Open 23 RI = 26k VDD = 5V 60 30 16.5 10.5 4 8 3.7 24 100 50 17.5 11.5 5 30 5.0 25 140 70 VIN Section VIN-OFF VIN-ON PWM Turn-off Threshold Voltage PWM Turn-on Threshold Voltage 0.65 VIN-OFF +0.18 0.70 VIN-OFF +0.20 0.75 VIN-OFF +0.22 V V Feedback Input Section AV ZFB VFBO VFB-OLP tD-OLP Input Voltage to Current Sense Attenuation Input Impedance FB Pin Open Voltage Threshold Voltage of Open-Loop Protection Open-Loop Protection Delay Time RI = 26k 4.7 100 At Green Mode 1/3.5 4.0 1/4.0 5.5 6.2 5.2 110 5.7 120 1/4.5 7.0 V/V k V V ms Current Sense Section ZSENSE tPD tLEB VSLOPE VSTH1V VSTH3V VSTH1V-1/2 VSTH3V-1/2 tD-OCP tSS-65KHz tSS-130KHz Input Impedance Delay to Output Leading-Edge Blanking Time Slope Compensation Threshold Voltage for Current Limit Threshold Voltage for Current Limit OCP Threshold Voltage for Current Limit OCP Threshold Voltage for Current Limit Delay Time for Over-Current Protection Period During Startup Time Duty = DCYMAX VIN = 1V VIN = 3V VIN = 1V VIN = 3V RI = 26k RI = 26k RI = 13k 270 0.30 1.07 0.91 0.52 0.44 100 4.5 2.25 12 100 360 0.33 1.10 0.94 0.55 0.47 110 5.0 2.50 0.36 1.13 0.97 0.58 0.50 120 5.5 2.75 250 k ns ns V V V V V ms ms ms Continued on following page... (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 5 SG6846G -- Highly Integrated Green-Mode PWM Controller Electrical Characteristics (Continued) VDD = 15V and TA = 25C unless otherwise noted. Symbol Oscillator Section fOSC Parameter Center Frequency Jitter Range Center Frequency Jitter Range Test Condition Min. Typ. Max. Unit Normal PWM Frequency RI = 26k, VFB>VN 62 3.7 65 4.2 130 8.4 47.0 2.90 4.4 11.5 22.5 2.8 4.2 2.3 1.45 85 2.0 68 4.7 136 9.4 49.2 3.26 4.9 12.8 25.0 3 4.7 2.5 1.62 2.2 5 kHz fOSC,MAX Maximum PWM Frequency RI = 13k, VFB>VN 124 7.4 kHz fOSC,MIN thop-1 thop-3 fOSC-G VFB-N VFB-G SG VFB-ZDC fDV fDT Center Minimum PWM Frequency Frequency Jitter Range Jitter Period Jitter period Green Mode Minimum Frequency FB Threshold Voltage for Frequency Reduction FB Voltage at fOSC-G Pin, FB Voltage Jitter Range Pin, FB Voltage Jitter Range RI = 36k, VFB>VN RI = 26k, VFB VN RI = 26k, VFB = VG RI = 26k RI = 26k, VFB = VN RI = 26k, VFB = VG RI = 26k 44.8 2.54 3.9 10.2 18.0 2.6 3.7 2.1 1.27 1.8 kHz ms ms kHz V KHz V KHz Hz/mV V % % Slope for Green-Mode Modulation FB Threshold Voltage for Zero Duty Cycle Frequency Variation vs. VDD Deviation Frequency Variation vs. Temperature Deviation VDD = 11.5V to 20V TA = -30 to 85C 1.5 5.0 Continued on following page... Figure 5. PWM Frequency (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 6 SG6846G -- Highly Integrated Green-Mode PWM Controller Electrical Characteristics (Continued) VDD = 15V and TA = 25C unless otherwise noted. Symbol PWM Output Section DCYMAX VOL VOH tR tF VCLAMP Parameter Maximum Duty Cycle Output Voltage LOW Output Voltage HIGH Rising Time Falling Time Gate Output Clamping Voltage (1) Test Condition Min. 80 Typ. 85 Max. 90 1.5 Unit % V V ns ns VDD = 15V, IO = 50mA VDD = 12V, IO = 50mA GATE = 1nF GATE = 1nF VDD = 20V 8 350 50 18 V Over-Temperature Protection (OTP) Section IRT VRTTH tDOTP-LATCH RRT-OFF Output Current of RT Pin Threshold Voltage for OTP RI = 26k RI = 26k RI = 26k 64 1.00 70 1.05 100 15 76 1.10 16 A V s k Over-Temperature Latch-off Debounce Equivalent Impedance of RT for OTP (1) 14 RI Section RINOR RIMAX RIMIN RI Operating Range Maximum RI Value for Protection Minimum RI Value for Protection 13 10 6 36 k M k (1) Note: 1. The relationship between RRT-OFF and RI is: RRT - OFF = VOTP -LATCH - OFF / IRT = VRT / (70 A x 26 / RI (K)) . (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 7 SG6846G -- Highly Integrated Green-Mode PWM Controller Typical Performance Characteristics 1 7.0 1 6.8 T e m p e ra t u re 11.5 11.0 V D D - O F F (V ) -40 -2 5 -10 5 20 35 50 65 80 95 1 10 125 VDD-ON (V ) 1 6.6 1 6.4 1 6.2 1 6.0 10.5 10.0 9.5 9.0 T e m p e ra t u re ( ) -4 0 -25 -10 5 20 35 50 65 80 95 1 10 125 T e m p e ra t u re ( ) Figure 6. Turn-on Threshold Voltage (VDD-ON) vs. Temperature Figure 7. Turn-off Threshold Voltage (VDD-OFF) vs. Temperature 2 6.0 2 2.0 1 8.0 1 4.0 1 0.0 6.0 -40 -25 -1 0 5 20 35 50 65 80 95 11 0 12 5 4 .0 3 .5 IDD-op (mA) IDD-ST (u A ) 3 .0 2 .5 2 .0 T e m p e ra t u re ( ) -4 0 -2 5 -1 0 5 20 35 50 65 80 95 110 125 Temperature ( ) Figure 8. Startup Current (IDD-ST) vs. Temperature Figure 9. Operating Supply Current (IDD-OP) vs. Temperature 0 .60 /@ )se pe atu e 0 .50 @VIN=3V) vs Temperature 0 .58 0 .49 VSTH1V-1/2 VSTH3V-1/2 -4 0 -25 -10 5 20 35 50 65 80 95 110 12 5 0 .56 0 .48 0 .54 0 .52 0 .47 0 .50 0 .46 -40 -25 -10 5 20 35 50 65 80 95 11 0 125 Temperature ( ) Temperature ( ) Figure 10. OCP Threshold Voltage for Current Limit (VSTH1V-1/2 at VIN = 1V) vs. Temperature Figure 11. OCP Threshold Voltage for Current Limit (VSTH3V-1/2 at VIN = 3V) vs. Temperature (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 8 SG6846G -- Highly Integrated Green-Mode PWM Controller Typical Performance Characteristics (Continued) 8 7.0 65.0 64.8 8 6.8 DCYmax (%) -4 0 -2 5 -1 0 5 20 35 50 65 80 95 1 10 1 25 FOSC ( k H z ) 64.6 64.4 64.2 64.0 8 6.6 8 6.4 8 6.2 8 6.0 -4 0 -25 -1 0 5 20 35 50 65 80 95 1 10 125 T e m p e r a tu r e ( ) Temperature ( ) Figure 12. Normal PWM Frequency (fOSC) vs. Temperature Figure 13. Maximum Duty Cycle (DCYMAX) vs. Temperature 70 .0 69 .8 1 .1 0 1 .0 8 VRTTH ( V) -4 0 -25 -10 5 20 35 50 65 80 95 110 125 IRT ( u A ) 69 .6 69 .4 1 .0 6 1 .0 4 69 .2 69 .0 1 .0 2 1 .0 0 -40 -2 5 -1 0 5 20 35 50 65 80 95 11 0 1 25 T e m p e r a tu r e ( ) T e m p e r a tu r e ( ) Figure 14. Output Current of RT Pin (IRT) vs. Temperature Figure 15. FB Output High Voltage (VRTTH) vs. Temperature 0.9 10 T e m p e ra t u re 0 .700 0.9 05 0 .695 VIN-ON (V ) 0.9 00 VIN-OFF ( V ) -4 0 -2 5 -10 5 20 35 50 65 80 95 11 0 12 5 0 .690 0.8 95 0 .685 0.8 90 0 .680 -40 -25 -1 0 5 20 35 50 65 80 95 11 0 125 T e m p e ra t u re ( ) T e m p e ra t u re ( ) Figure 16. PWM Turn-on Threshold Voltage (VIN-ON) vs. Temperature Figure 17. PWM Turn-off Threshold Voltage (VIN-OFF) vs. Temperature (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 9 SG6846G -- Highly Integrated Green-Mode PWM Controller Operation Description Startup Operation The turn-on/turn-off thresholds are fixed internally at 16.5V and 10.5V. To enable the SG6846G during startup, the hold-up capacitor must first be charged to 16.5V through the startup resistor. The hold-up capacitor continues to supply VDD before energy can be delivered from the auxiliary winding of the main transformer. The VDD must not drop below 10.5V during this startup process. This UVLO hysteresis window ensures that the hold-up capacitor can adequately supply VDD during startup. The typical startup current is only 8A, which allows a high-resistance, low-wattage startup resistor to be used to minimize power loss. A 1.5M/0.25W startup resistor and a 10F/25V VDD hold-up capacitor are sufficient for a universal input range. The required operating current has been reduced to 3.7mA, which enables higher efficiency and reduces the VDD hold-up capacitance requirement. Two-Level Over-Current Protection (OCP) The cycle-by-cycle current limiting shuts down the PWM immediately when the switching current is over the peak-current threshold. Additionally, when the switching current is higher than half of the peak-current threshold, the internal counter counts down. When the total accumulated counting time is more than ~110ms (RI = 26k), the controller is latched off and the internal counter counts up. When the switching current is lower than half of the peak current threshold, the internal counter counts down. When the total accumulated counting time is more than ~110ms (RI = 26k), the controller is latched off. This two-level OCP protection and up/down counter are especially designed for SMPS with surge current output, such as those for printers, scanners, and motor drivers. Constant Output Power Limit For constant output power limit over a universal inputvoltage range, the peak-current threshold is adjusted by the voltage of the VIN pin. Since the VIN pin is connected to the rectified AC input line voltage through the resistive divider, a higher line voltage generates a higher VIN voltage. The threshold voltage decreases as the VIN increases, making the maximum output power at high line input voltage equal to that at low line input. The value of R-C network should not be so large it affects the power limit (shown in Figure 18). R and C should put on less than 300 and 1000pF respectively. Green-Mode Operation The proprietary green-mode function provides off-time modulation to continuously decrease the switching frequency under light-load conditions. Maximum on-time is limited to provide protection against abnormal conditions. To further reduce power consumption under zero-load condition, the PWM oscillator is completely turned off and the power supply enters burst-mode. This green-mode function dramatically reduces power consumption under light-load and zero-load conditions. Power supplies using SG6846G can meet international regulations regarding standby power consumption. Brownout Protection Since the VIN pin is connected through a resistive divider to the rectified AC input line voltage, it can also be used for brownout protection. If the VIN voltage is less than 0.7V, the PWM output is shut off. If the VIN over 0.9V, the PWM output is turned on again. The hysteresis window for ON/OFF is ~0.2V. Oscillator Operation A resistor connected from the RI pin to GND generates a reference current source, inside the SG6846G, used to determine the PWM frequency. Increasing the resistance decreases the amplitude of the current source and reduces the PWM frequency. Using a 26k resistor results in a corresponding 65kHz switching frequency. The relationship between RI and the switching frequency is: VDD Over-Voltage Protection (OVP) VDD over-voltage protection prevents damage; when VDD is over 24V, the SG6846G is latched off. fPWM(kHz) = 1690 R I (k ) (2) Over-Temperature Protection (OTP) An external NTC thermistor can be connected from the RT pin to GND. The impedance of the NTC decreases at high temperatures. When the voltage of the RT pin drops below 1.05V, the SG6846G is turned off. For protection-mode options, see Ordering Information. If an open-circuit or short-circuit to ground occurs at the RI pin, the internal protection circuit immediately shuts down the controller. (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 10 SG6846G -- Highly Integrated Green-Mode PWM Controller Operation Description (Continued) Noise Immunity Noise from the current sense or the control signal may cause significant pulse-width jitter, particularly in continuous-conduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. Avoid long PCB traces and component leads. Compensation and filter components should be located near the SG6846G. Figure 18. Current Sense R-C Filter (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 11 SG6846G -- Highly Integrated Green-Mode PWM Controller Reference Circuit P1 F1 RT1 t 2 2 4 3 1 CY1 CX1LF2 BD1 1 2 5 R16 D4 TX1 13 3 6 + 1 2 2 VZ1 P2 P7 1 3 4 2 2 LF1 CY2 R8 3 1 C2 R12 C4 D2 1 2 C16 + 1 + C12 2 CX2 4 P32V P32V L1 + 32V C13 32V 10 1 7 1 3 9 R1 R2 R3 2 R9 D1 1 + 21 2 + C11 R17 P16V P16V L2 2 2 11 1 2 3 L4 D3 12 2 1 + C17 + D5 1 C14 2 1 R4 1 C3 C5 1 R11 + 16V 16V C15 U1 1 GND FB VIN RI GATE VDD SENSE RT 8 7 6 5 2 R13 R6 R10 NTC1 C6 Q1 1 2 FB 2 2 3 L3 R14 P16V C1 1 + R5 4 R7 1 3 P16V R15 4 1 FB FB P16V 1 P32V C7 3 C9 U2 2 K R P16V R18 R19 R21 P32V R20 U3 A Figure 19. Application Circuit for 32V / 16V Output BOM Part No. R1, R2, R3, R4 R8, R9 R5 R15 R13 R18 R21 R7 R6 R19 R14 R16, R17 R11 R12 R20 R22 Value 470K 5% S1M 1% 16K2 1% 1K5 5% 10 5% 4K7 5% 15K 1% 27K 5% 330 1% 102K 1% 022 5% 1W 20 5% 20K 5% 100K 5% 887K 1% 10K 1% Part No. C4 C10,C11 C6,C7 C9 C14,C17 C15 C13,C16 C2 C1 C3 CX1 C8 C5 CX2 D1 D2 Value 103 P 630V 102 P 1KV 102 P 50V 222 P 50V 470 25V 220 25V 220 50V 150 400V 47 50V 10 50V X1 0.47 275V Y2 222P 250V 100 50V X2 0.1F 275V 1N4148 BYV95C Part No. D3 BD1 D4 D5 F1 L1,L2 L4 U3 U1 U2 Q1 TX1 RT1 VZ1 Value FR103 1.0A 200V DBL406G BYT28-300 BYV32-150 250V4A QUICK 1.8H 10H TL431 +/-1% SG 6846 PC817 7NB60 EI-33 SCK053 14 470V (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 12 SG6846G -- Highly Integrated Green-Mode PWM Controller Physical Dimensions 5.00 4.80 3.81 8 5 A 0.65 B 6.20 5.80 4.00 3.80 1 4 1.75 5.60 PIN ONE INDICATOR (0.33) 1.27 0.25 M CBA 1.27 LAND PATTERN RECOMMENDATION 0.25 0.10 1.75 MAX C 0.10 0.51 0.33 0.50 x 45 0.25 C SEE DETAIL A 0.25 0.19 OPTION A - BEVEL EDGE R0.10 R0.10 GAGE PLANE 0.36 OPTION B - NO BEVEL EDGE NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13 8 0 0.90 0.406 SEATING PLANE (1.04) DETAIL A SCALE: 2:1 Figure 20. 8-Pin Small Outline Package (SOP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 13 SG6846G -- Highly Integrated Green-Mode PWM Controller (c) 2008 Fairchild Semiconductor Corporation SG6846G * Rev. 1.0.0 www.fairchildsemi.com 14 |
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